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PCI-SIG Announces CopprLink Cable Specifications for PCIe 5.0 and 6.0 Technology

TheLostSwede

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PCI-SIG, the organization responsible for the widely adopted PCI Express (PCIe) standard, today announced the release of the CopprLink Internal and External Cable specifications. The CopprLink Cable specifications provide signaling at 32.0 and 64.0 GT/s and leverage well-established industry standard connector form factors maintained by SNIA.

"The CopprLink Cable specifications integrate PCIe cabling seamlessly with the PCIe electrical base specification, providing longer channel reach and topological flexibility," said Al Yanes, PCI-SIG President and Chairperson. "The CopprLink Cables are intended to evolve with the same connector form factors, scale for future PCIe technology generations and meet the demands of emerging applications. The Electrical Work Group has already begun pathfinding work on CopprLink Cables for PCIe 7.0 technology at 128.0 GT/s, showcasing PCI-SIG's commitment to the CopprLink Cable specifications."




CopprLink Internal Cable Specification
  • Supports PCIe 5.0 and 6.0 technology signaling at 32.0 and 64.0 GT/s
  • Includes the SNIA SFF-TA-1016 connector form factor
  • Maximum of 1 m reach within a single system
  • Example implementations include motherboard-to-add-in-card, motherboard-to-backplane, chip-to-chip and add-in-card-to-backplane in a self-contained server platform node
  • Target applications include storage and data center compute nodes
CopprLink External Cable Specification
  • Supports PCIe 5.0 and 6.0 technology signaling at 32.0 and 64.0 GT/s
  • Includes the SNIA SFF-TA-1032 connector form factor
  • Maximum of up to 2 m reach in rack-to-rack connections
  • Example implementations include CPU-to-storage, CPU-to-memory, CPU-to-accelerator, and accelerator fabrics in disaggregated server platform nodes
  • Target applications include storage and data center AI/ML use cases
The CopprLink Internal and External Cable specifications are now available for PCI-SIG members to download.

View at TechPowerUp Main Site | Source
 

TheLostSwede

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I wonder if it would be cheaper to use cables instead of traces on a motherboard
No.
The cables will also need redrivers/retimers, so it will not be cheaper.
 
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If thinks if they gonna run cables all over the mobo, they should just skip this & move to all optical & be done with it.....

But that's not the way the milk & silk game is played, so we'll just have to spend god knows how much $$ on this stuff for while, then suddenly, the optical version will be the next "latest & greatest thing", and then we get to do it all over again :(
 
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PCIe 5.0 eGPU enclosures when? Seriously I have a need :D imagine the next gen handhelds with a CopprLink port :eek:
 
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Good! Now, to have non-server/industrial only providers bring this to the consumer space.

I can't be alone in getting tired of low-quality flex risers, and being largely stuck with Gen2 speeds (for reliability).
 
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Good! Now, to have non-server/industrial only providers bring this to the consumer space.

I can't be alone in getting tired of low-quality flex risers, and being largely stuck with Gen2 speeds (for reliability).

It would be so nice to have a cable that can serve PCIe 5 / 6. It would finally allow larger form factor consumer drives thus reducing price and increasing max capacity in addition to allowing desktops to use PCIe 4.0 and newer U.2 / U..3 enterprise drives. It's pretty much impossible to use PCIe 4.0 and 5.0 enterprise drives on regular desktops reliably due to signal integrity issues.
 
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It would be so nice to have a cable that can serve PCIe 5 / 6. It would finally allow larger form factor consumer drives thus reducing price and increasing max capacity in addition to allowing desktops to use PCIe 4.0 and newer U.2 / U..3 enterprise drives. It's pretty much impossible to use PCIe 4.0 and 5.0 enterprise drives on regular desktops reliably due to signal integrity issues.
The ability of humans to send many tens of gigaheartz far away through cheap wires seems exhausted, or nearly so. But what we have achieved by now would seem like pure magic 20 years ago.
 

TheLostSwede

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PCIe 5.0 eGPU enclosures when? Seriously I have a need :D imagine the next gen handhelds with a CopprLink port :eek:
Not going to happen if you read the slide, there will be a separate thing for external PCIe for "normal" applications.
There doesn't seem to be a cool marketing name for it yet.
 
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Not going to happen if you read the slide, there will be a separate thing for external PCIe for "normal" applications.
There doesn't seem to be a cool marketing name for it yet.
Huh, but why?! The only reason I can think of to have a different cable is so they can make a cheaper to build cable for consumer use, but then it'll likely have lower bandwidth &/or shorter runs it works over :(
 

TheLostSwede

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Huh, but why?! The only reason I can think of to have a different cable is so they can make a cheaper to build cable for consumer use, but then it'll likely have lower bandwidth &/or shorter runs it works over :(
If you again look at the slide, the "PCI Express External Cabling" as it's listed as, is "limited" to PCIe 5.0. The cable runs can apparently be up to 3 meters though, but only at PCIe 3.0 speeds, whereas PCIe 5.0 speeds are up to two meters and PCIe 4.0 speeds at up to 2.5 meters. The plan appears to be to use the SFF-8614 mini-SAS connector, which imho isn't really ideal.

This is the CopprLink connector
1714644844175.png


This is the SFF-8614 connector.
1714644954407.png
 
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Oh nice, ty for the schematics comparison too! I had missed the run lengths in the slide :oops: but good news that they plan on supporting 2m at PCIe 5.0, that's plenty of length for the majority of use cases. I agree on the consumer connector choice - I also don't like it!
 
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Oh nice, ty for the schematics comparison too! I had missed the run lengths in the slide :oops: but good news that they plan on supporting 2m at PCIe 5.0, that's plenty of length for the majority of use cases. I agree on the consumer connector choice - I also don't like it!
More info:

PDF spec/design doc for the external CopprLink PHY.

I like the heavy shielding and robust termination.
The x4 variety looks small enough to be viable in the Consumer space.
Would be nice to see more ePCIe options besides (variable) USB4 or Proprietary specs like TB.
 
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